1. Field of the Invention
This invention relates to the field of semiconductor apparatus and, more particularly, self-aligned guard regions for semiconductor device elements.
2. Description of the Prior Art
A Schottky barrier diode is formed by a suitable metal contact to a semiconductor body. As is known, such a diode is a useful part of transistor logic circuits, particularly of the bipolar type, for increasing the speed of circuit operation. As is also known, a suitable impurity guard zone or ring surrounding the perimeter of the Schottky barrier is desirable to suppress unwanted diode edge effects. In modern VLSI (Very Large Scale Integrated) circuits, it would be desirable to make each such Schottky barrier diode together with its guard rings as small as possible in order to conserve precious semiconductor surface area.
Integrated circuit devices--such as bipolar transistors, as well as MOS (Metal Oxide Semiconductor) transistors--are conventionally defined by lithographic masking and etching steps, involving processing that requires selective exposure of a lithographic medium sensitive typically to electromagnetic or electron beam radiation. The minimum distance between opposed spaced apart sidewalls of an aperture defined and patterned by this method, the minimum process line-width, can be typically as little as about 2 microns in current technology. Thus, the smallest Schottky barrier diode made by such a typical process would have a diameter of 2 microns, exclusive of the guard ring. It can therefore be appreciated that if the guard ring would also be defined by further conventional lithography, then the overall lateral extent of the final Schottky barrier diode (including the guard ring) undesirably would be significantly larger than the 2 microns, and thus the speed of the diode would also be degraded because of the undesirably large area of the PN junction formed by the guard ring itself.
In the prior art, guard zones have been made for such semiconductor device elements as insulated gate field effect transistors and Schottky diodes. For example, in U.S. Pat. No. 4,282,539 entitled "Field Effect Transistor With Decreased Substrate Control of the Channel Width," issued to L. Schrader on Aug. 4, 1981, an insulated gate field effect transistor element is disclosed with a relatively narrow channel guard zone in the form of a strip (guard) region running along the outer edges of the transistor channel from source to drain. This guard zone or region is doped with impurities of such conductivity type and concentration as to inhibit the undesirable influence of the fluctuating potential between the source and the semiconductor body substrate on the effective width of the channel inversion layer during operation. Such fluctuating potential in the absence of this impurity doped guard region (or "zone") would cause unwanted fluctuations in the effective width of the channel inversion layer and hence unwanted fluctuations in the impedance of the transistor.
In U.S. Pat. No. 4,261,095 entitled "Self-Aligned Schottky Guard Ring," issued to R. F. Dreves et al. on Apr. 14, 1981, a Schottky barrier semiconductor diode element is described with a guard ring encircling the Schottky barrier for the purpose of suppressing undesirable barrier edge effects. The guard ring consists of an impurity doped zone at the surface of the semiconductor encircling the Schottky barrier thereat. This guard ring is described as being formed by introduction of impurities through an annular ring window (aperture). This ring in that patent is defined by space between edges of a circular window in an insulating layer on the surface of the semiconductor and the perimeter of a central area (within the circular window) on which has been deposited a metal layer by a straight-line shadow technique using an overhanging circular mask against deposition of the metal. The space between the perimeter of the central area and the edges of the circular window is thus defined by the overhang of the mask. A problem with the resulting Schottky barrier diode structure in that patent arises because portions of the surface of the semiconductor body underneath the overhang of the mask, located between a peripheral silicon dioxide passivation layer and the central Schottky barrier metallization layer, remain uncoated and exposed; so that the operational characteristics of the Schottky diode element tend to be degraded by residues of cleaning and etching solutions remaining on these portions of the surface, since such residues can undesirably attack the metallization, the oxide, or the semiconductor. Moreover, because of the use of an undercutting etching step, the overall area consumed by the diode element is undesirably increased. Also, ion implantation of the guard ring region cannot be used because of the device geometry, and therefore introduction of impurities by diffusion at undesirably high temperatures and with less control over the final guard ring zone profile must be used.
Thus, semiconductor device elements with self-aligned guard regions would be desirable which do not suffer from these shortcomings of the prior art.